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TPT9L484(3PEAK思瑞浦)

  • The TPT9L484 is a 3.3V 4-CH Low-VoltageDifferential (LVDS) line receivers, which can support400 Mbps data rates. Receiver inputs are protectedagainst 8kV ESD strikes without latch-up.The TPT9L484 can accept low voltage differentialinput sig
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The TPT9L484 is a 3.3V 4-CH Low-VoltageDifferential (LVDS) line receivers, which can support400 Mbps data rates. Receiver inputs are protectedagainst ±8kV ESD strikes without latch-up.The TPT9L484 can accept low voltage differentialinput signals as 350 mV typical, and translates themto 3.3V CMOS output levels. The receivers support aTri-state function that may be used to multi-channeloutputs. The receivers also support open, shorted,and terminated (100 Ω) input Fail-safe, with holdingoutput as HIGH level. The device is characterized foroperation from –40°C to 85°C. The device is availablein 16-lead TSSOP package.

Features

⚫ Exceeds the LVDS Standard TIA/EIA-644 forHigh speed Data Interchange
⚫ Low-Voltage Differential 100-Ω (typical) LineReceivers for Signaling Rates, Up to 400Mbps, 200Mbps Clock
⚫ 3.3-V Power Supply Design
⚫ 6 ns Maximum Propagation Delay
⚫ 0.1 ns Differential Skew (Typical)
⚫ Accepts Small Swing (350 mV Typical) VIDSupports Open, Short, and Terminated InputFail-Safe
⚫ Power Down High Impedance on LVDSInputs
⚫ Bus-Pin Protection: ±8 kV HBM model
⚫ –40°C to 85°C Operation Temperature Range


Applications

⚫ Backplane Multipoint Data/Clock Transmission
⚫ Cellular Base Stations
⚫ Network Switches and Routers
⚫ Industrial Control
⚫ Communication Infrastructure 
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